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; this is a comparator circuit : tran g s d

DEFINE COMP vref a b vdd gnd d clk
SUBCIRCUIT COMP vref a b vdd gnd d clk

mp_1 a 3 1
mp_2 b 3 2
mp_3 vref vdd 3

mp_4 clk 3 gnd
mp_5 clk vdd 5

mp_6 2 5 1
mp_7 1 5 2
mn_8 2 1 gnd
mn_9 1 2 gnd
mn_10 clk 1 2

mp_11 vref vdd 7
mp_12 1 7 8
mp_13 2 7 9
mn_14 8 8 gnd
mn_15 8 9 gnd

mp_16 9 vdd d
mn_17 9 gnd d


SYM 1 = 2
SYM 6 = 7
SYM 8 = 9
SYM 12 = 13
SYM 14 = 15
